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Main text(s) Main text(s) Estonian Mikrolülituse topoloogia kaitse seadus (konsolideeritud tekst 31.08.2023)     

Legislation Implements (2 text(s)) Implements (2 text(s))

• Council Directive 2002/56/EC of 13 June 2002 on the marketing of seed potatoes (codified version)  (EU290)
• Seeds and Plant Propagating Material Act (consolidated text 01.04.2014) (EE241)

Supersedes (6 text(s)) Supersedes (6 text(s))

• Layout-Designs of Integrated Circuits Protection Act (consolidated text of April 1, 2019) (EE230)
• Regulation No. 14 of the Minister of Agriculture of April 20, 1999, on the Endorsement of Categories of Seed Potato, and Procedures for Accreditation of Laboratories Producing Seed Potatoes, and Packaging, Marketing and Importation of Seed Potatoes (consolidated text of September 15, 2003) (EE237)
• Layout-Designs of Integrated Circuits Protection Act (consolidated text of January 1, 2015) (EE156)
• Layout-Designs of Integrated Circuits Protection Act (consolidated text of January 1, 2012) (EE121)
• Layout-Designs of Integrated Circuits Protection Act (EE008)
• Regulation No. 14 of the Minister of Agriculture of April 20, 1999, on the Endorsement of Categories of Seed Potato, and Procedures for Accreditation of Laboratories Producing Seed Potatoes, and Packaging, Marketing and Importation of Seed Potatoes (EE046)

Is amended by (1 text(s)) Is amended by (1 text(s))

• Act on Amendments to the Patents Act and Other Acts (RT I, 06.01.2023, 2) (EE248)

Is implemented by (3 text(s)) Is implemented by (3 text(s))

• Regulation No. 17 of the Minister of Justice of January 3, 2012, on the Procedure for Access to and Release of Information from the Register of Layout-Designs of Integrated Circuits (consolidated text of June 3, 2013) (EE193)
• Regulation No. 15 of the Minister of Justice of January 3, 2012, on the Requirements for the Format and the Procedure for Filing of Registration Application Documents of the Layout-Design of Integrated Circuits (EE197)
• Regulation No. 16 of the Minister of Justice of January 3, 2012, on the Requirements for the Format and the Procedure for the Issue of Certificates of Layout-Designs of Integrated Circuits (EE195)